The present disclosure relates to a gate driver, a driving circuit for, and a liquid crystal display (LCD).
A LCD is a flat plate display commonly used currently, and a thin film transistor liquid crystal display (TFT-LCD) is the mainstream product of the LCD. FIG. 1 is a schematic structural diagram showing a driving circuit for a TFT-LCD in the prior art, in which a timing controller 1 is used to generate various controlling signals, such as a gate line turning-on signal which is usually referred to as the Clock Pulse Vertical (CPV) signal in the art, a gate frame turning-on signal which is usually referred to as the Start Vertical (STV) signal in the art, a gate output enabling signal which is usually referred to as the Output Enable (OE) signal, etc. The timing controller 1 inputs the various controlling signals generated into a high voltage TFT-LCD logic driver 2, which generates a first clock signal which is usually referred to as the CKV signal in the art, a second clock signal which is usually referred to as the CKVB signal in the art, and an improved STV signal which is usually referred to as the STVP signal by the SPV signal, the SW signal and the OE signal etc. The improved STV signal refers to an SW signal for which the level has been adjusted. Since the level of the STV signal output from the timing controller may not coincide with the level of the STV signal required by the gate driving circuit, it is required to convert the level of the STV signal by some level converting circuits. It is possible to drive the gate by inputting the CKVB signal, the CKV signal, and the STVP signal into a gate driving circuit 3.
In a driving circuit for a TFT-LCD, when the gate driving circuit outputs a gate driving signal, which is usually referred to as the Gate signal, to turn on a row of gate lines, usually a source driving circuit inputs the data signals of the respective pixels corresponding to the row of gate lines onto the respective pixel electrodes of the row. In other words, when the Gate signal is of a high level, the source driving circuit inputs the data signals into the pixel electrodes. In a practical application, the falling edge of the Gate signal delays, therefore, when the Gate1 signal of the current row is in its falling edge, the Gate2 signal of the next row has already started to rise. In other words, the source driving circuit inputs the data corresponding to the next row of pixels before the respective TFTs corresponding to the previous row of gate lines are turned off, which results in a mix with the data of the previous row of pixels and influences the quality of the image display.